Matthew Papakipos's Resume

Matthew Papakipos                                                              

Palo Alto, California

matt-resume@papakipos.com

http://www.papakipos.com/Home/matthew-papakipos-s-resume

Expertise

  • Starting & growing startup computer technology companies
  • Creating great hardware and software products
  • Hiring and managing great engineering teams

Career Highlights
  • Ads: Facebook Local Awareness advertising system
  • Mobile networking: Facebook WiFi
  • Operating Systems: Chrome OS
  • Web browsers: GPU-accelerated browsers & web applications
  • Chip design: Programmable GPUs

Project Skills

Entrepreneurship

I start & grow high technology startup companies in Silicon Valley. I excel in hiring top engineering talent, and together conceiving and building innovative products in new categories. I am very comfortable with all stages of startup growth, including financing, hiring, product specification, hardware and software architecture, engineering management, product positioning and launch, evangelism, and press.

Design & Architecture

I architect complex computer systems. I’ve invented and patented a large number of hardware and software algorithms for solving real-world problems. I design systems that are novel, yet practical. I like solving problems that seem impossible to others: making graphics chips programmable (NVIDIA), making browser apps as fast as conventional native apps (NativeClient), making web apps that use graphics hardware (WebGL), creating a new consumer operating system (Chrome OS). 

Leadership

I’ve managed both hardware and software project teams, with team sizes up to eighty five people with multiple managers reporting in to me. I’ve recruited and hired hundreds of great engineers, and trained and promoted new engineers and managers and coached them through their first successful projects. I run organizations where I am responsible for setting raises, granting stock options, presenting and writing performance reviews, and developing organizational structure and responsibilities. People who work on my teams often tell me they are the best engineering teams they've been a part of, and we build amazing new products.

Intellectual Property

I’ve filed over seventy patents. I’ve supervised disclosures and filing for hundreds more for my employees. I am well versed in protecting IP through all phases of high technology startup companies. I believe that good products come from novel ideas. 

Communication

I’ve negotiated software interface specifications with hardware and software vendors and standards bodies (OpenGL, WebGL, HTML5). I’ve spoken at technical conferences for developers using my products. I am frequently interviewed by technical magazines, industry analysts, and the financial press. 

Education

Brown University, Bachelor of Science, Math/Computer Science, 1993.

Stanford University, attended Economics, Math, & CS courses for 2003-2004 academic year.

Palo Alto High School

Employment History

Facebook2010-2014

Engineering Director

Developed range of projects to connect Facebook more deeply into users' daily lives, including:
Worked on various company growth initiatives, including:
  • Building the Facebook engineering mobile hiring recruiting process, and hiring over 200 iOS and Android engineers. 
  • Lead the design and deployment of Facebook's iOS and Android training program for engineers making the switch to mobile development.
  • Moved the Local Ads & Facebook WiFi teams from Silicon Valley to London.

Google2007-2010

Engineering Director

Created a range of browser, OS, and hardware technologies to make the web richer and a deeper part of daily user application experience. Created new technologies that give browsers and web applications the ability to use CPU & GPU hardware acceleration. This allows developers to create more compelling web applications.
  • I created and led the Chrome OS project at Google. Created a consumer operating system for netbook computers. Open sourced the software in 2009. Hired the engineering team. The team received a TechCrunch "Crunchie" Award for this work.
  • I created and led the Chrome GPU hardware project. Created mechanisms to allow web applications to use GPU hardware accelerated graphics. This includes WebGL and O3D
  • Led the Chrome OS UI team for part of my tenure.
  • Led the Chrome HTML5 & APIs team for part of my tenure. These APIs expose the set of hardware and OS capabilities available to web applications in the Chrome web browser. This includes the HTML5 APIs. The APIs launched include: geolocation, offline APIs, rich text editing, WebSockets. 
  • I started the NativeClient project and helped incubate it through its early days. NativeClient is technology for creating secure web applications that run native C++ code. Filed several of the key early patents.

PeakStream2005-2007 

CTO & occasional Acting VP of Engineering

PeakStream was a Silicon Valley startup company funded by Sequoia Capital, Kleiner Perkins, and Foundation Capital. I founded the company, raised two rounds of venture capital funding, and hired over half of the staff of the company. PeakStream was a leading company developing software environments for multi-core processors and GPUs. As CTO, I was responsible for product architecture, technical leadership, and all technical communication for customers, investors, business partners, and press. Google acquired the company in 2007.

NVIDIA1997–2003        

Director of Architecture

I was responsible for the development of hardware architectures for NVIDIA’s graphics chips (GPUs). This included feature selection, hardware design, cmodel development, verification, and developer evangelism. I was responsible for salaries, performance reviews, raises, stock grants, promotions, organizational structure, and external communication for this group. I had four managers reporting to me and a total group size of eighty five people. I was responsible for protecting the IP generated by my group. All of the chip projects below shipped in volume to the mass market in PCs all over the world.


GPU development projects:


  • GeForce 6800 Family: Directed our first simultaneous development of three PC GPUs at once, with four managers reporting to me. This architecture is also in the PS3 game console.
  • GeForce FX & GeForce FX Go: Led IP review & filing of twenty five patents.
  • GeForce 4 & GeForce 4 MX: Directed two managers, launching two GPU chips simulatenously, enhancing profitability substantially.
  • GeForce 3 & Quadro 3: Created the first programmable GPU. This architecture is the heart of the XBox game console.
  • GeForce 2 & GeForce 2 MX
  • GeForce & Quadro: chip architecture & simulation
  • TNT & TNT 2: cmodel integration and verification


Engineering process initiatives:


  • Linux Server Farm: In 1999, I conceived and designed NVIDIA’s Linux server farm. I saw a tremendous opportunity to save money spent on Sun computers by transitioning our server environment to Linux machines. We rolled it out initially in a cubicle; today it is a server farm of more than 3,000 processors and terabytes of memory and petabytes of disk storage. 
  • Chip Feature Database: I designed a web-based application for requesting, prioritizing, and managing feature requests for graphics chips. We used this to methodically manage and prioritize the vast number of incoming requests from our developer community and customers.


External communication:


  • Negotiated Direct3D graphics APIs with Microsoft, aligning the GeForce 3 perfectly with DirectX 8.
  • Created the “Multitexture” extension for OpenGL and achieved ratification of our new standard by the OpenGL ARB standards body, leading NVIDIA’s entry into the OpenGL ARB standards body.
  • Spoke at countless game developer events, including GDC.
  • Frequently met with top game developers at Id, Valve, Epic, Microsoft and EA to evangelize new product features for games.

Raycer Graphics, 1997

Raycer was a startup company that developed a graphics chip for use in the CAD market. I was one of three architects for the Raycer scanline rendering algorithm. I was responsible for making the hardware architecture OpenGL compliant.

SGI, 1996

I developed UNIX device drivers for the Impact graphics workstation. I architected novel surface tessellation algorithms for the Odyssey graphics workstation.

daVinci Time & Space, 1995

I developed a system for interactive television presentation and led a small team coding the runtime software for presenting digital television content, including scripting system, graphics display, and input management.

Time Warner Interactive Group, 1994

I developed software for live video effects on Time Warner’s interactive television project. This system performed all the real-time fades, dissolves, wipes, etc. between live video sequences for an interactive shopping application that was deployed in Florida in 1994.

Pacific Title, 1993

I designed a computer graphics system for offloading traditional optical film effects processing onto a computer system. Due to large dataset sizes, we used the IBM PVS, a 32 processor SMP supercomputer. I was responsible for all of the development of the core image processing algorithms on the supercomputer.

MasPar Computer Corp., 1990

I developed a Mandelbrot Fractal viewer as a demo for this supercomputer. Compared to previous implementations, ours was the first that was fast enough to be honestly called real-time. This demo was avidly used by our sales force in selling the machine. I published a technical paper about the algorithm details, and how to extract maximum performance from the novel hardware architecture of this SIMD supercomputer.

MIT Laboratory For Computer Science (LCS), 1989

UNIX X Server software development.

Brown University Computer Graphics Group, 1988–1990

As leader of a three student team, I implemented a triangle renderer on the Connection Machine, a 4096 processor supercomputer. Published a Technical Report.

DEC, Palo Alto, 1986 – 1987

UNIX X Server software development.

HP, Cupertino, 1985

UNIX C library validation.

Patents

US Patents Issued



17,643,030Method and system for efficiently evaluating and drawing NURBS surfaces for 3D graphics
27,570,266Multiple data buffers for processing graphics data
37,508,394Systems and methods of multi-pass data processing
47,477,266Digital image compositing using a programmable graphics processor
57,289,126Gamma-corrected texel storage in a graphics memory
67,274,369Digital image compositing using a programmable graphics processor
77,256,796Per-fragment control for writing an output buffer
87,233,335System and method for reserving and managing memory spaces in a memory resource
97,224,359Depth clamping system and method in a hardware graphics pipeline
107,167,181Deferred shading graphics pipeline processor having advanced features
117,154,507System, method and computer program product for texture shading
127,151,543Vertex processor with multiple interfaces
137,142,215Method and apparatus for processing stencil data using a programmable graphics processor
147,139,003Methods of processing graphics data including reading and writing buffers
157,136,070System, method and computer program product for using an arbitrary quantity as texture address
167,109,999Method and system for implementing programmable texture lookups from texture coordinate sets
177,098,922Multiple data buffers for processing graphics data
187,081,895Systems and methods of multi-pass data processing
197,075,539Apparatus and method for processing dual format floating-point data in a graphics processing system
207,071,947Automatic adjustment of floating point output images
217,064,763Single semiconductor graphics platform
227,053,904Position conflict detection and avoidance in a programmable graphics processor
237,050,055Single semiconductor graphics platform with blending and fog capabilities
247,034,829Masking system and method for a graphics processing framework embodied on a single semiconductor platform
257,015,914Multiple data buffers for processing graphics data
267,002,577Clipping system and method for a single graphics semiconductor platform
276,992,667Single semiconductor graphics platform system and method with skinning, swizzling and masking capabilities
286,950,107System and method for reserving and managing memory spaces in a memory resource
296,906,718Method and system for efficiently evaluating and drawing NURBS surfaces for 3D graphics
306,828,980System, method and computer program product for z-texture mapping
316,774,895System and method for depth clamping in a hardware graphics pipeline
326,771,264Method and apparatus for performing tangent space lighting and bump mapping in a deferred shading graphics processor
336,765,575Clip-less rasterization using line equation-based traversal
346,731,298System, method and article of manufacture for z-texture mapping
356,717,576Deferred shading graphics pipeline processor having advanced features
366,650,331System, method and computer program product for performing a scissor operation in a graphics processing framework embodied on a single semiconductor platform
376,597,363Graphics processor with deferred shading
386,577,309System and method for a graphics processing framework embodied utilizing a single semiconductor platform
396,532,013System, method and article of manufacture for pixel shaders for programmable shading
406,462,737Clipping system and method for a graphics processing framework embodied on a single semiconductor platform
416,342,888Graphics processing unit with an integrated fog and blending operation
426,333,744Graphics pipeline including combiner stages
436,268,875Deferred shading graphics pipeline processor
446,229,553Deferred shading graphics pipeline processor
456,198,488Transform, lighting and rasterization system embodied on a single semiconductor platform



US Patent Applications



120100017461Method and System for Executing Applications Using Native Code Modules
220100013842Web-Based Graphics Rendering System
320090282477Method for Validating an Untrusted Native Code Module
420090282474Method for Safely Executing an Untrusted Native Code Module on a Computing Device
520080005547Systems and methods for generating reference results using a parallel-processing computer system
620070294696Multi-thread runtime system
720070294682Systems and methods for caching compute kernels for an application running on a parallel-processing computer system
820070294681Systems and methods for profiling an application running on a parallel-processing computer system
920070294680Systems and methods for compiling an application for a parallel-processing computer system
1020070294671Systems and methods for debugging an application running on a parallel-processing computer system
1120070294666Systems and methods for determining compute kernels for an application in a parallel-processing computer system
1220070294665Runtime system for executing an application in a parallel-processing computer system
1320070294663Application program interface of a parallel-processing computer system that supports multiple programming languages
1420070294512Systems and methods for dynamically choosing a processing element for a compute kernel
1520070294508Parallel pseudorandom number generation
1620070165035Deferred Shading Graphics Pipeline Processor Having Advanced Features
1720050073520Method and system for efficiently evaluating and drawing NURBS surfaces for 3D graphics
1820040207630System and method for reserving and managing memory spaces in a memory resource
1920040169650Digital image compositing using a programmable graphics processor
2020040130552Deferred shading graphics pipeline processor having advanced features
2120040012563Systems and methods of multi-pass data processing
2220030189565Single semiconductor graphics platform system and method with skinning, swizzling and masking capabilities
2320030112245Single semiconductor graphics platform
2420030103050Masking system and method for a graphics processing framework embodied on a single semiconductor platform
2520020196259Single semiconductor graphics platform with blending and fog capabilities
2620020180740Clipping system and method for a single graphics semiconductor platform
2720020105519Clipping system and method for a graphics processing framework embodied on a single semiconductor platform
2820020047846System, method and computer program product for performing a scissor operation in a graphics processing framework embodied on a single semiconductor platform
2920020027553Diffuse-coloring system and method for a graphics processing framework embodied on a single semiconductor platform


Publications

Papers

Presentations



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